]> granicus.if.org Git - llvm/commit
[SystemZ] Model access registers as LLVM registers
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 8 Nov 2016 20:15:26 +0000 (20:15 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 8 Nov 2016 20:15:26 +0000 (20:15 +0000)
commitba2fbb8f1e4f22aa938ac5210b63a702f274d5de
treedb624dc2fea7184509258edbcf944c2dade09ef7
parent18fd3e63e3ece05645e1a5b090bbcb83b11cd947
[SystemZ] Model access registers as LLVM registers

Add the 16 access registers as LLVM registers.  This allows removing
a lot of special cases in the assembler and disassembler where we
were handling access registers; this can all just use the generic
register code now.

Also add a bunch of instructions to operate on access registers,
for assembler/disassembler use only.  No change in code generation
intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286283 91177308-0d34-0410-b5e6-96231b3b80d8
22 files changed:
lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.cpp
lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h
lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
lib/Target/SystemZ/SystemZISelLowering.cpp
lib/Target/SystemZ/SystemZISelLowering.h
lib/Target/SystemZ/SystemZInstrInfo.cpp
lib/Target/SystemZ/SystemZInstrInfo.td
lib/Target/SystemZ/SystemZOperands.td
lib/Target/SystemZ/SystemZOperators.td
lib/Target/SystemZ/SystemZRegisterInfo.cpp
lib/Target/SystemZ/SystemZRegisterInfo.td
lib/Target/SystemZ/SystemZScheduleZ13.td
lib/Target/SystemZ/SystemZScheduleZ196.td
lib/Target/SystemZ/SystemZScheduleZEC12.td
test/MC/Disassembler/SystemZ/insns.txt
test/MC/SystemZ/insn-bad.s
test/MC/SystemZ/insn-good.s
test/MC/SystemZ/regs-bad.s
test/MC/SystemZ/regs-good.s