]> granicus.if.org Git - llvm/commit
[x86] allow insert/extract when matching horizontal ops
authorSanjay Patel <spatel@rotateright.com>
Fri, 11 Jan 2019 14:27:59 +0000 (14:27 +0000)
committerSanjay Patel <spatel@rotateright.com>
Fri, 11 Jan 2019 14:27:59 +0000 (14:27 +0000)
commitb80a9e6dba7aae24e438b7f938b7b0d352e84e49
treeb6ca7606c59a4182935fc4273d527114194ed5bb
parent8185e09ae22d5a0c0f9d5a6d2a303a42746fd10c
[x86] allow insert/extract when matching horizontal ops

Previously, we limited this transform to cases where the
extraction into the build vector happens from vectors of
the same type as the build vector, but that's not required.

There's a slight potential regression seen in the AVX512
result for phadd -- we're using the 256-bit flavor of the
instruction now even though the 128-bit subset is sufficient.
The same problem could already be seen in the AVX2 result.
Follow-up patches will attempt to narrow that back down.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350928 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/haddsub-undef.ll
test/CodeGen/X86/phaddsub-undef.ll