]> granicus.if.org Git - llvm/commit
[X86] Teach lower1BitShuffle to match right shifts with upper zero elements on types...
authorCraig Topper <craig.topper@intel.com>
Mon, 19 Aug 2019 05:45:39 +0000 (05:45 +0000)
committerCraig Topper <craig.topper@intel.com>
Mon, 19 Aug 2019 05:45:39 +0000 (05:45 +0000)
commitb768e23deb2a6fecb90dc1f2e08aad9730183df8
tree178095b88444815da94496ad272902d3568bae38
parent2f1ee6f74ca80006266d80fac2c4d3112ab91a99
[X86] Teach lower1BitShuffle to match right shifts with upper zero elements on types that don't natively support KSHIFT.

We can support these by widening to a supported type,
then shifting all the way to the left and then
back to the right to ensure that we shift in zeroes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369232 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/kshift.ll