]>
author | Matt Arsenault <Matthew.Arsenault@amd.com> | |
Mon, 15 Jul 2019 17:50:31 +0000 (17:50 +0000) | ||
committer | Matt Arsenault <Matthew.Arsenault@amd.com> | |
Mon, 15 Jul 2019 17:50:31 +0000 (17:50 +0000) | ||
commit | b508009134c1349367df52d96bf8d8db6e7f7247 | |
tree | 6e3d881c5486f3bf57a2a8e05a941a859dbb671c | tree | snapshot |
parent | 260d1e96f9cc90a6b2cef28c317f0213cdd898c0 | commit | diff |
include/llvm/IR/IntrinsicsAMDGPU.td | diff | blob | history | |
lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | diff | blob | history | |
lib/Target/AMDGPU/SIISelLowering.cpp | diff | blob | history | |
test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll | [new file with mode: 0644] | blob |
test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll | [new file with mode: 0644] | blob |
test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll | [new file with mode: 0644] | blob |
test/CodeGen/AMDGPU/mad_uint24.ll | diff | blob | history | |
test/CodeGen/AMDGPU/mul.i16.ll | diff | blob | history | |
test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll | diff | blob | history |