granicus.if.org Git - llvm/commit

]> granicus.if.org Git - llvm/commit

author	Nirav Dave <niravd@google.com>
	Wed, 27 Mar 2019 19:54:41 +0000 (19:54 +0000)
committer	Nirav Dave <niravd@google.com>
	Wed, 27 Mar 2019 19:54:41 +0000 (19:54 +0000)
commit	b4adfc21eb738271491e524e99e033bdd8964fba
tree	1b24e02ca6b35b98781ab71700611f8b5bd6931f	tree \| snapshot
parent	58c0bdde21eae54cd9ea3ae93b0af84c0d6f65e5	commit \| diff

Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes."

This patch appears to trigger very large compile time increases in
halide builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357116 91177308-0d34-0410-b5e6-96231b3b80d8

49 files changed:

include/llvm/CodeGen/SelectionDAG.h		diff \| blob \| history
lib/CodeGen/SelectionDAG/DAGCombiner.cpp		diff \| blob \| history
lib/CodeGen/SelectionDAG/SelectionDAG.cpp		diff \| blob \| history
test/CodeGen/AArch64/unfold-masked-merge-vector-variablemask-const.ll		diff \| blob \| history
test/CodeGen/ARM/CGP/arm-cgp-icmps.ll		diff \| blob \| history
test/CodeGen/ARM/arm-storebytesmerge.ll		diff \| blob \| history
test/CodeGen/ARM/vdup.ll		diff \| blob \| history
test/CodeGen/Mips/indirect-jump-hazard/jumptables.ll		diff \| blob \| history
test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll		diff \| blob \| history
test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll		diff \| blob \| history
test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll		diff \| blob \| history
test/CodeGen/X86/3addr-or.ll		diff \| blob \| history
test/CodeGen/X86/avx-load-store.ll		diff \| blob \| history
test/CodeGen/X86/midpoint-int-vec-128.ll		diff \| blob \| history
test/CodeGen/X86/oddshuffles.ll		diff \| blob \| history
test/CodeGen/X86/psubus.ll		diff \| blob \| history
test/CodeGen/X86/sadd_sat_vec.ll		diff \| blob \| history
test/CodeGen/X86/sat-add.ll		diff \| blob \| history
test/CodeGen/X86/select_const.ll		diff \| blob \| history
test/CodeGen/X86/shuffle-strided-with-offset-512.ll		diff \| blob \| history
test/CodeGen/X86/shuffle-vs-trunc-512-widen.ll		diff \| blob \| history
test/CodeGen/X86/shuffle-vs-trunc-512.ll		diff \| blob \| history
test/CodeGen/X86/ssub_sat_vec.ll		diff \| blob \| history
test/CodeGen/X86/uadd_sat_vec.ll		diff \| blob \| history
test/CodeGen/X86/umul_fix.ll		diff \| blob \| history
test/CodeGen/X86/unfold-masked-merge-vector-variablemask-const.ll		diff \| blob \| history
test/CodeGen/X86/usub_sat_vec.ll		diff \| blob \| history
test/CodeGen/X86/vec_minmax_sint.ll		diff \| blob \| history
test/CodeGen/X86/vec_minmax_uint.ll		diff \| blob \| history
test/CodeGen/X86/vector-narrow-binop.ll		diff \| blob \| history
test/CodeGen/X86/vector-reduce-smax-widen.ll		diff \| blob \| history
test/CodeGen/X86/vector-reduce-smax.ll		diff \| blob \| history
test/CodeGen/X86/vector-reduce-smin-widen.ll		diff \| blob \| history
test/CodeGen/X86/vector-reduce-smin.ll		diff \| blob \| history
test/CodeGen/X86/vector-reduce-umax-widen.ll		diff \| blob \| history
test/CodeGen/X86/vector-reduce-umax.ll		diff \| blob \| history
test/CodeGen/X86/vector-reduce-umin-widen.ll		diff \| blob \| history
test/CodeGen/X86/vector-reduce-umin.ll		diff \| blob \| history
test/CodeGen/X86/vector-shuffle-128-v8.ll		diff \| blob \| history
test/CodeGen/X86/vector-shuffle-256-v16.ll		diff \| blob \| history
test/CodeGen/X86/vector-trunc-packus-widen.ll		diff \| blob \| history
test/CodeGen/X86/vector-trunc-packus.ll		diff \| blob \| history
test/CodeGen/X86/vector-trunc-ssat-widen.ll		diff \| blob \| history
test/CodeGen/X86/vector-trunc-ssat.ll		diff \| blob \| history
test/CodeGen/X86/vector-trunc-usat-widen.ll		diff \| blob \| history
test/CodeGen/X86/vector-trunc-usat.ll		diff \| blob \| history
test/CodeGen/X86/vsel-cmp-load.ll		diff \| blob \| history
test/CodeGen/X86/zext-demanded.ll		diff \| blob \| history
test/CodeGen/X86/zext-logicop-shift-load.ll		diff \| blob \| history

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