]> granicus.if.org Git - llvm/commit
[X86][AVX512F] Fix reg class for VMOVSSZrr/VMOVSSZrrk and VMOVSDZrr/VMOVSDZrrk
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 26 Mar 2017 12:52:28 +0000 (12:52 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 26 Mar 2017 12:52:28 +0000 (12:52 +0000)
commitacbed126667c00abc87bf43b834c341b07eebd0a
tree1c01739740499164a4f3b0dd6036c55172af2a78
parent29226b40633bdc058f6bdcb28fadb896adb9662d
[X86][AVX512F] Fix reg class for VMOVSSZrr/VMOVSSZrrk and VMOVSDZrr/VMOVSDZrrk

Fixed -verify-machineinstrs errors in fast-isel-select-sse.ll (one of many in PR27481)

The VMOVSSZrr/VMOVSSZrrk and VMOVSDZrr/VMOVSDZrrk instructions were assuming both source registers were V128X when the second is actually supposed to be FR32X/FR64X

Differential Revision: https://reviews.llvm.org/D31200

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298805 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrAVX512.td
test/CodeGen/X86/fast-isel-select-sse.ll