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soc: fix/update definitions related to FRC timers
authorIvan Grokhotkov <ivan@espressif.com>
Mon, 7 Aug 2017 20:27:10 +0000 (04:27 +0800)
committerIvan Grokhotkov <ivan@espressif.com>
Thu, 24 Aug 2017 08:33:12 +0000 (16:33 +0800)
commita66df0826e292289f1691d471aab3be249f4f53f
treece733ce67e350918cbf7df92b5e924b36f6bf33atree | snapshot
parent922c584de60800f5ea948e5f7484c4fb7e8cce8acommit | diff
soc: fix/update definitions related to FRC timers

1. BIT(8) of CTRL is actually read-only bit indicating interrupt status

2. BIT(0) or CTRL had inverted meaning: 1 is “level”, 0 is “edge”

3. Add definitions of prescaler values
components/soc/esp32/include/soc/frc_timer_reg.h diff | blob | history
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