]> granicus.if.org Git - llvm/commit
[Hexagon] Switch to parameterized register classes for HVX
authorKrzysztof Parzyszek <kparzysz@codeaurora.org>
Fri, 15 Sep 2017 15:46:05 +0000 (15:46 +0000)
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>
Fri, 15 Sep 2017 15:46:05 +0000 (15:46 +0000)
commita50c5eba3ec8f529c31fde2add1c25a8689e42df
treeac164f446ae34b8861b01d492c187950b076bce7
parentae3278a7b7ff3e3457d9729aa2a0c36745ecd923
[Hexagon] Switch to parameterized register classes for HVX

This removes the duplicate HVX instruction set for the 128-byte mode.
Single instruction set now works for both modes (64- and 128-byte).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313362 91177308-0d34-0410-b5e6-96231b3b80d8
29 files changed:
lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
lib/Target/Hexagon/Hexagon.td
lib/Target/Hexagon/HexagonAsmPrinter.cpp
lib/Target/Hexagon/HexagonBitSimplify.cpp
lib/Target/Hexagon/HexagonBitTracker.cpp
lib/Target/Hexagon/HexagonCopyToCombine.cpp
lib/Target/Hexagon/HexagonDepInstrInfo.td
lib/Target/Hexagon/HexagonDepMappings.td
lib/Target/Hexagon/HexagonEarlyIfConv.cpp
lib/Target/Hexagon/HexagonExpandCondsets.cpp
lib/Target/Hexagon/HexagonFrameLowering.cpp
lib/Target/Hexagon/HexagonHardwareLoops.cpp
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
lib/Target/Hexagon/HexagonISelLowering.cpp
lib/Target/Hexagon/HexagonInstrFormats.td
lib/Target/Hexagon/HexagonInstrInfo.cpp
lib/Target/Hexagon/HexagonInstrInfo.h
lib/Target/Hexagon/HexagonIntrinsics.td
lib/Target/Hexagon/HexagonIntrinsicsV60.td
lib/Target/Hexagon/HexagonMapAsm2IntrinV62.gen.td
lib/Target/Hexagon/HexagonPatterns.td
lib/Target/Hexagon/HexagonPseudo.td
lib/Target/Hexagon/HexagonRegisterInfo.cpp
lib/Target/Hexagon/HexagonRegisterInfo.h
lib/Target/Hexagon/HexagonRegisterInfo.td
lib/Target/Hexagon/HexagonSubtarget.cpp
lib/Target/Hexagon/HexagonSubtarget.h
lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h