]> granicus.if.org Git - llvm/commit
[AMDGPU] Fix for branch offset hardware workaround
authorRyan Taylor <rtayl@amd.com>
Wed, 26 Jun 2019 17:34:57 +0000 (17:34 +0000)
committerRyan Taylor <rtayl@amd.com>
Wed, 26 Jun 2019 17:34:57 +0000 (17:34 +0000)
commita12a08761e88116dd8e3390d13506f12b16d1aa3
tree5ede6fa84ad0121e68c4281679203e1318c49e6c
parent3f58e459310fd9fc0b7f8cdc6737110379c7677f
[AMDGPU] Fix for branch offset hardware workaround

Summary:
This fixes a hardware bug that makes a branch offset of 0x3f unsafe.
This replaces the 32 bit branch with offset 0x3f to a 64 bit
instruction that includes the same 32 bit branch and the encoding
for a s_nop 0 to follow. The relaxer than modifies the offsets
accordingly.

Change-Id: I10b7aed99d651f8159401b01bb421f105fa6288e

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63494

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364451 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/AMDGPU.td
lib/Target/AMDGPU/AMDGPUSubtarget.cpp
lib/Target/AMDGPU/AMDGPUSubtarget.h
lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
lib/Target/AMDGPU/SIInstrInfo.td
lib/Target/AMDGPU/SOPInstructions.td
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
test/MC/AMDGPU/offsetbug_once.s [new file with mode: 0644]
test/MC/AMDGPU/offsetbug_one_and_one.s [new file with mode: 0644]
test/MC/AMDGPU/offsetbug_twice.s [new file with mode: 0644]