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(parent: ef8535b) | patch
AMDGPU: Add intrinsics for address space identification
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 5 Sep 2019 02:20:39 +0000 (02:20 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 5 Sep 2019 02:20:39 +0000 (02:20 +0000)
commit9f717fa86d2d38973806a08153f41a87a9b5c3b3
tree5bfccd2bb240158dc198cc85a17322d74b61770etree | snapshot
parentef8535baee64d6d9d0719286909301e7550da66dcommit | diff
AMDGPU: Add intrinsics for address space identification

The library currently uses ptrtoint and directly checks the queue ptr
for this, which counts as a pointer capture.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371009 91177308-0d34-0410-b5e6-96231b3b80d8
12 files changed:
include/llvm/IR/IntrinsicsAMDGPU.td diff | blob | history
lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp diff | blob | history
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp diff | blob | history
lib/Target/AMDGPU/AMDGPULegalizerInfo.h diff | blob | history
lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp diff | blob | history
lib/Target/AMDGPU/SIISelLowering.cpp diff | blob | history
test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll [new file with mode: 0644] blob
test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll [new file with mode: 0644] blob
test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll diff | blob | history
test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll [new file with mode: 0644] blob
test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll [new file with mode: 0644] blob
test/Transforms/InferAddressSpaces/AMDGPU/address-space-id-funcs.ll [new file with mode: 0644] blob
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