]> granicus.if.org Git - llvm/commit
[X86][TableGen] Allow timm to appear in output patterns. Use it to remove ConvertToTa...
authorCraig Topper <craig.topper@intel.com>
Sun, 22 Sep 2019 19:49:39 +0000 (19:49 +0000)
committerCraig Topper <craig.topper@intel.com>
Sun, 22 Sep 2019 19:49:39 +0000 (19:49 +0000)
commit9e847d733b38476fd598890fb1f5e8ccebd8ce63
treec179cb07e53661e16776503357455800786bea8b
parenta6b2442416120cb295bf2a0adfd81b6fdac34caf
[X86][TableGen] Allow timm to appear in output patterns. Use it to remove ConvertToTarget opcodes from the X86 isel table.

We're now using a lot more TargetConstant nodes in SelectionDAG.
But we were still telling isel to convert some of them
to TargetConstants even though they already are. This is because
isel emits a conversion anytime the output pattern has a an 'imm'.
I guess for patterns in instructions we take the 'timm' from the
'set' pattern, but for Pat patterns with explcicit output we
previously had to say 'imm' since 'timm' wasn't allowed in outputs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372525 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrAVX512.td
lib/Target/X86/X86InstrSSE.td
lib/Target/X86/X86InstrXOP.td
utils/TableGen/CodeGenDAGPatterns.cpp