projects / llvm / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 2439c57) | patch
Merging r167855 into 3.2 relase branch
authorPawel Wodnicki <pawel@32bitmicro.com>
Mon, 19 Nov 2012 22:17:54 +0000 (22:17 +0000)
committerPawel Wodnicki <pawel@32bitmicro.com>
Mon, 19 Nov 2012 22:17:54 +0000 (22:17 +0000)
commit97b07299fad0d019224912afe63fa916c4a0c507
tree62ee88b7a34f55ee515bc1f551270be75d8a7370tree | snapshot
parent2439c573e6f9bc76d6bfd99bbac0b097f2c1a2d7commit | diff
Merging r167855 into 3.2 relase branch

Do not consider a machine instruction that uses and defines the same
physical register as candidate for common subexpression elimination
in MachineCSE.

This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc
caused by MachineCSE invalidly merging two separate DYNALLOC insns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_32@168334 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/MachineCSE.cpp diff | blob | history
test/CodeGen/PowerPC/2012-10-11-dynalloc.ll [new file with mode: 0644] blob
Unnamed repository; edit this file 'description' to name the repository.