Fix per-processor model scheduler definition completeness check

Fix per-processor model scheduler definition completeness check

The CodeGenSchedModels::checkCompleteness routine in TableGen/
CodeGenSchedule.cpp is supposed to verify for each processor
model that is marked as "complete" that it actually defines a
scheduling class for each instruction.

However, this did not work correctly due to an incorrect
check whether a scheduling class has an itinerary.

Reviewer: atrick
Differential revision: https://reviews.llvm.org/D26156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285622 91177308-0d34-0410-b5e6-96231b3b80d8