]> granicus.if.org Git - llvm/commit
[X86][SSE] Move VSRAI sign extend in reg fold into SimplifyDemandedBits
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 18 Dec 2018 09:11:34 +0000 (09:11 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 18 Dec 2018 09:11:34 +0000 (09:11 +0000)
commit94f848082d67e94103f11b628c276ae2e3dc4fe7
treed8bb079ec2719dd89fb6be36ff0c1122695c74a3
parentce5a6119833914748df042b0880f0d609ad0b3be
[X86][SSE] Move VSRAI sign extend in reg fold into SimplifyDemandedBits

(VSRAI (VSHLI X, C1), C1) --> X iff NumSignBits(X) > C1

This works better as part of SimplifyDemandedBits than part of the general combine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349462 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp