]> granicus.if.org Git - llvm/commit
[AMDGPU] Add f16 support (VI+)
authorKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>
Sun, 13 Nov 2016 07:01:11 +0000 (07:01 +0000)
committerKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>
Sun, 13 Nov 2016 07:01:11 +0000 (07:01 +0000)
commit9027123253154e3bc9e7cf0605c943a5cd60b1da
tree6ab006d5daff5a5f4fe4fd7ecf1cbe3370ecf358
parentdead081fb270405507bf3a0a37413a3b54c1fbe0
[AMDGPU] Add f16 support (VI+)

Differential Revision: https://reviews.llvm.org/D25975

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286753 91177308-0d34-0410-b5e6-96231b3b80d8
60 files changed:
lib/Target/AMDGPU/AMDGPU.td
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
lib/Target/AMDGPU/AMDGPUInstructions.td
lib/Target/AMDGPU/AMDGPUSubtarget.cpp
lib/Target/AMDGPU/AMDGPUSubtarget.h
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
lib/Target/AMDGPU/SIFoldOperands.cpp
lib/Target/AMDGPU/SIISelLowering.cpp
lib/Target/AMDGPU/SIISelLowering.h
lib/Target/AMDGPU/SIInstrInfo.cpp
lib/Target/AMDGPU/SIInstrInfo.td
lib/Target/AMDGPU/SIInstructions.td
lib/Target/AMDGPU/SIRegisterInfo.td
lib/Target/AMDGPU/SIShrinkInstructions.cpp
lib/Target/AMDGPU/VOP1Instructions.td
lib/Target/AMDGPU/VOP2Instructions.td
lib/Target/AMDGPU/VOP3Instructions.td
lib/Target/AMDGPU/VOPCInstructions.td
test/CodeGen/AMDGPU/fadd.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/fcmp.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/fdiv.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/fmul.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/fp_to_sint.ll
test/CodeGen/AMDGPU/fp_to_uint.ll
test/CodeGen/AMDGPU/fpext.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/fptosi.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/fptoui.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/fptrunc.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/fsub.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/half.ll
test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.amdgcn.cos.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.amdgcn.fract.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.amdgcn.sin.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.ceil.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.cos.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.exp2.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.floor.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.fma.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.log2.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.maxnum.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.minnum.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.rint.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.sin.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.sqrt.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/llvm.trunc.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/sint_to_fp.i64.ll
test/CodeGen/AMDGPU/sitofp.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/uint_to_fp.i64.ll
test/CodeGen/AMDGPU/uitofp.f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/v_mac_f16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/v_madak_f16.ll [new file with mode: 0644]
test/MC/Disassembler/AMDGPU/sdwa_vi.txt