]> granicus.if.org Git - llvm/commit
projects / llvm / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 61fe4ef) | patch
AMDGPU/GlobalISel: Increase max legal size to 1024
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 1 Oct 2019 16:35:06 +0000 (16:35 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 1 Oct 2019 16:35:06 +0000 (16:35 +0000)
commit8ec8c66e716ea2987fe6980bd828544e7c9758dc
tree49bd2d291fcad1570f7b8f7e532bc8ee5b114c26tree | snapshot
parent61fe4ef60e3668bf148382478f6a8039e55622a0commit | diff
AMDGPU/GlobalISel: Increase max legal size to 1024

There are 1024 bit register classes defined for AGPRs. Additionally
OpenCL defines vectors up to 16 x i64, and this helps those tests
legalize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373350 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp diff | blob | history
lib/Target/AMDGPU/AMDGPURegisterBanks.td diff | blob | history
lib/Target/AMDGPU/SIRegisterInfo.cpp diff | blob | history
test/CodeGen/AMDGPU/GlobalISel/inst-select-extract.mir diff | blob | history
test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir diff | blob | history
test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir diff | blob | history
test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir diff | blob | history
test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir diff | blob | history
test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir diff | blob | history
test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir diff | blob | history
test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir diff | blob | history
Unnamed repository; edit this file 'description' to name the repository.