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[AMDGPU] Combine DS operations with offsets bigger than byte
authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Thu, 13 Apr 2017 17:53:07 +0000 (17:53 +0000)
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Thu, 13 Apr 2017 17:53:07 +0000 (17:53 +0000)
commit881e9f317759f2a1e32a01bad39eb08cdad91dc1
treeda98f5062d271deee0081bda582daf510f298398tree | snapshot
parentb39f4c5d6c023856f035536a50312ba39b7ca906commit | diff
[AMDGPU] Combine DS operations with offsets bigger than byte

In many cases ds operations can be combined even if offsets do not
fit into 8 bit encoding. What it takes is to adjust base address.

Differential Revision: https://reviews.llvm.org/D31993

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300227 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp diff | blob | history
test/CodeGen/AMDGPU/ds-combine-large-stride.ll [new file with mode: 0644] blob
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