]> granicus.if.org Git - llvm/commit
[mips] Fix multiprecision arithmetic.
authorSimon Dardis <simon.dardis@imgtec.com>
Wed, 14 Jun 2017 14:46:30 +0000 (14:46 +0000)
committerSimon Dardis <simon.dardis@imgtec.com>
Wed, 14 Jun 2017 14:46:30 +0000 (14:46 +0000)
commit8665c171659ed78eb0d2b18352c600028e2d57cb
treebe8240bab778afee3397f9e29be9e48a5ca5d8a8
parentcb9c282754f0185a89cc5c3c2d7dad31f688f756
[mips] Fix multiprecision arithmetic.

For multiprecision arithmetic on MIPS, rather than using ISD::ADDE / ISD::ADDC,
get SelectionDAG to break down the operation into ISD::ADDs and ISD::SETCCs.

For MIPS, only the DSP ASE has a carry flag, so in the general case it is not
useful to directly support ISD::{ADDE, ADDC, SUBE, SUBC} nodes.

Also improve the generation code in such cases for targets with
TargetLoweringBase::ZeroOrOneBooleanContent by directly using the result of the
comparison node rather than using it in selects. Similarly for ISD::SUBE /
ISD::SUBC.

Address optimization breakage by moving the generation of MIPS specific integer
multiply-accumulate nodes to before legalization.

This revolves PR32713 and PR33424.

Thanks to Simonas Kazlauskas and Pirama Arumuga Nainar for reporting the issue!

Reviewers: slthakur

Differential Revision: https://reviews.llvm.org/D33494

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305389 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
lib/Target/Mips/MipsISelLowering.cpp
lib/Target/Mips/MipsSEISelDAGToDAG.cpp
lib/Target/Mips/MipsSEISelDAGToDAG.h
lib/Target/Mips/MipsSEISelLowering.cpp
test/CodeGen/Mips/2008-06-05-Carry.ll
test/CodeGen/Mips/dsp-patterns.ll
test/CodeGen/Mips/llcarry.ll
test/CodeGen/Mips/llvm-ir/add.ll
test/CodeGen/Mips/llvm-ir/sub.ll
test/CodeGen/Mips/madd-msub.ll