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author | Matt Arsenault <Matthew.Arsenault@amd.com> | |
Tue, 16 Jul 2019 20:25:43 +0000 (20:25 +0000) | ||
committer | Matt Arsenault <Matthew.Arsenault@amd.com> | |
Tue, 16 Jul 2019 20:25:43 +0000 (20:25 +0000) | ||
commit | 81598fb771c48b0c4adeefa2592649f567ba1bfc | |
tree | 3043f85b54eb965187e98c1285d79435f9fdc45c | tree | snapshot |
parent | aae61649ecd608f5205b14e76924cf3b8f155ab0 | commit | diff |
lib/Target/AMDGPU/SOPInstructions.td | diff | blob | history | |
lib/Target/AMDGPU/VOP2Instructions.td | diff | blob | history | |
lib/Target/AMDGPU/VOP3Instructions.td | diff | blob | history | |
test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir | [new file with mode: 0644] | blob |
test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir | [new file with mode: 0644] | blob |
test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir | [new file with mode: 0644] | blob |