]> granicus.if.org Git - llvm/commit
[DAG] Don't increase SDNodeOrder for dbg.value/declare.
authorMikael Holmen <mikael.holmen@ericsson.com>
Thu, 19 Jan 2017 13:55:55 +0000 (13:55 +0000)
committerMikael Holmen <mikael.holmen@ericsson.com>
Thu, 19 Jan 2017 13:55:55 +0000 (13:55 +0000)
commit7f6f824722e014991a3321b46f1662ef9dfbecc6
treee5fa390bd9319c5a51047498116f38541481d626
parent08536b81ae4a0c6b6b69bdcb046fbd7174b201e4
[DAG] Don't increase SDNodeOrder for dbg.value/declare.

Summary:
The SDNodeOrder is saved in the IROrder field in the SDNode, and this
field may affects scheduling. Thus, letting dbg.value/declare increase
the order numbers may in turn affect scheduling.

Because of this change we also need to update the code deciding when
dbg values should be output, in ScheduleDAGSDNodes.cpp/ProcessSDDbgValues.

Dbg values now have the same order as the SDNode they are connected to,
not the following orders.

Test cases provided by Florian Hahn.

Reviewers: bogner, aprantl, sunfish, atrick

Reviewed By: atrick

Subscribers: fhahn, probinson, andreadb, llvm-commits, MatzeB

Differential Revision: https://reviews.llvm.org/D25318

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292485 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
test/CodeGen/AArch64/selectiondag-order.ll [new file with mode: 0644]
test/CodeGen/X86/selectiondag-order.ll [new file with mode: 0644]