]> granicus.if.org Git - llvm/commit
[X86] Add patterns for folding a v16i8 with the VEX vcvtph2ps intrinsics.
authorCraig Topper <craig.topper@intel.com>
Tue, 7 Nov 2017 07:13:06 +0000 (07:13 +0000)
committerCraig Topper <craig.topper@intel.com>
Tue, 7 Nov 2017 07:13:06 +0000 (07:13 +0000)
commit7f4581842bdb77ca9bbfd2b6d3bc94aa69c7c892
treea866c27d2fb63efb5dcf596475f82f588b0bb79d
parent2765e2df21aff3d5dd96af1dda3a7cfa353e637e
[X86] Add patterns for folding a v16i8 with the VEX vcvtph2ps intrinsics.

Disable the peephole pass to prove that the pattern is working.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317547 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrSSE.td
test/CodeGen/X86/f16c-intrinsics.ll