]> granicus.if.org Git - llvm/commit
[ARM][LowOverheadLoops] Add CPSR defs
authorSam Parker <sam.parker@arm.com>
Fri, 26 Jul 2019 08:15:01 +0000 (08:15 +0000)
committerSam Parker <sam.parker@arm.com>
Fri, 26 Jul 2019 08:15:01 +0000 (08:15 +0000)
commit7ef465876ad8200760986c9264dcc213067dbee0
treefe06c89116024f6b30a44ce8805493d65c795d03
parent9889150b54b474b85aa6b8c879c9729680f21cc6
[ARM][LowOverheadLoops] Add CPSR defs

Both WhileLoopStart and LoopEnd may get turned into a cmp and br pair,
so add an implicit def to these pseudo instructions in case that WLS
and LE aren't generated.

Differential Revision: https://reviews.llvm.org/D65275

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367089 91177308-0d34-0410-b5e6-96231b3b80d8
13 files changed:
lib/Target/ARM/ARMInstrThumb2.td
test/CodeGen/Thumb2/LowOverheadLoops/cond-mov.mir
test/CodeGen/Thumb2/LowOverheadLoops/end-positive-offset.mir
test/CodeGen/Thumb2/LowOverheadLoops/massive.mir
test/CodeGen/Thumb2/LowOverheadLoops/multiblock-massive.mir
test/CodeGen/Thumb2/LowOverheadLoops/revert-after-call.mir
test/CodeGen/Thumb2/LowOverheadLoops/revert-after-spill.mir
test/CodeGen/Thumb2/LowOverheadLoops/revert-non-loop.mir
test/CodeGen/Thumb2/LowOverheadLoops/revert-while.mir
test/CodeGen/Thumb2/LowOverheadLoops/size-limit.mir
test/CodeGen/Thumb2/LowOverheadLoops/switch.mir
test/CodeGen/Thumb2/LowOverheadLoops/while-negative-offset.mir
test/CodeGen/Thumb2/LowOverheadLoops/while.mir