]> granicus.if.org Git - llvm/commit
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
authorGuozhi Wei <carrot@google.com>
Fri, 14 Jun 2019 23:08:59 +0000 (23:08 +0000)
committerGuozhi Wei <carrot@google.com>
Fri, 14 Jun 2019 23:08:59 +0000 (23:08 +0000)
commit7eae8125c63bb72c2103f17ba01d6eb1e7ca5052
tree2315a65568cfcd82d33c626d436a43fd4dfe2198
parent5035f0c64b5dd70a4e5727b9e2efb9322f254fbe
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop

Current findBestLoopTop can find and move one kind of block to top, a latch block has one successor. Another common case is:

    * a latch block
    * it has two successors, one is loop header, another is exit
    * it has more than one predecessors

If it is below one of its predecessors P, only P can fall through to it, all other predecessors need a jump to it, and another conditional jump to loop header. If it is moved before loop header, all its predecessors jump to it, then fall through to loop header. So all its predecessors except P can reduce one taken branch.

Differential Revision: https://reviews.llvm.org/D43256

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363471 91177308-0d34-0410-b5e6-96231b3b80d8
70 files changed:
lib/CodeGen/MachineBlockPlacement.cpp
test/CodeGen/AArch64/cmpxchg-idioms.ll
test/CodeGen/AArch64/neg-imm.ll
test/CodeGen/AArch64/tailmerging_in_mbp.ll
test/CodeGen/AMDGPU/collapse-endcf.ll
test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
test/CodeGen/AMDGPU/global_smrd_cfg.ll
test/CodeGen/AMDGPU/hoist-cond.ll
test/CodeGen/AMDGPU/i1-copy-from-loop.ll
test/CodeGen/AMDGPU/indirect-addressing-si.ll
test/CodeGen/AMDGPU/loop_break.ll
test/CodeGen/AMDGPU/loop_exit_with_xor.ll
test/CodeGen/AMDGPU/madmk.ll
test/CodeGen/AMDGPU/multilevel-break.ll
test/CodeGen/AMDGPU/optimize-negated-cond.ll
test/CodeGen/AMDGPU/si-annotate-cf.ll
test/CodeGen/AMDGPU/valu-i1.ll
test/CodeGen/AMDGPU/wqm.ll
test/CodeGen/ARM/2011-03-23-PeepholeBug.ll
test/CodeGen/ARM/arm-and-tst-peephole.ll
test/CodeGen/ARM/atomic-cmp.ll
test/CodeGen/ARM/atomic-cmpxchg.ll
test/CodeGen/ARM/code-placement.ll
test/CodeGen/ARM/pr32578.ll
test/CodeGen/ARM/swifterror.ll
test/CodeGen/Hexagon/bug6757-endloop.ll
test/CodeGen/Hexagon/early-if-merge-loop.ll
test/CodeGen/Hexagon/prof-early-if.ll
test/CodeGen/Hexagon/redundant-branching2.ll
test/CodeGen/PowerPC/atomics-regression.ll
test/CodeGen/PowerPC/cmp_elimination.ll
test/CodeGen/PowerPC/ctrloop-shortLoops.ll
test/CodeGen/PowerPC/expand-foldable-isel.ll
test/CodeGen/PowerPC/knowCRBitSpill.ll
test/CodeGen/PowerPC/licm-remat.ll
test/CodeGen/SystemZ/atomicrmw-minmax-01.ll
test/CodeGen/SystemZ/atomicrmw-minmax-02.ll
test/CodeGen/SystemZ/loop-01.ll
test/CodeGen/SystemZ/loop-02.ll
test/CodeGen/SystemZ/swifterror.ll
test/CodeGen/Thumb/consthoist-physical-addr.ll
test/CodeGen/X86/block-placement.ll
test/CodeGen/X86/code_placement.ll
test/CodeGen/X86/code_placement_cold_loop_blocks.ll
test/CodeGen/X86/code_placement_ignore_succ_in_inner_loop.ll
test/CodeGen/X86/code_placement_loop_rotation2.ll
test/CodeGen/X86/code_placement_no_header_change.ll
test/CodeGen/X86/conditional-tailcall.ll
test/CodeGen/X86/loop-blocks.ll
test/CodeGen/X86/loop-rotate.ll [new file with mode: 0644]
test/CodeGen/X86/lsr-loop-exit-cond.ll
test/CodeGen/X86/move_latch_to_loop_top.ll [new file with mode: 0644]
test/CodeGen/X86/pr38185.ll
test/CodeGen/X86/ragreedy-hoist-spill.ll
test/CodeGen/X86/reverse_branches.ll
test/CodeGen/X86/speculative-load-hardening.ll
test/CodeGen/X86/swifterror.ll
test/CodeGen/X86/tail-dup-merge-loop-headers.ll
test/CodeGen/X86/tail-dup-repeat.ll
test/CodeGen/X86/vector-shift-by-select-loop.ll
test/CodeGen/X86/widen_arith-1.ll
test/CodeGen/X86/widen_arith-2.ll
test/CodeGen/X86/widen_arith-3.ll
test/CodeGen/X86/widen_arith-4.ll
test/CodeGen/X86/widen_arith-5.ll
test/CodeGen/X86/widen_arith-6.ll
test/CodeGen/X86/widen_cast-4.ll
test/CodeGen/X86/x86-cmov-converter.ll
test/DebugInfo/X86/PR37234.ll
test/DebugInfo/X86/dbg-value-transfer-order.ll