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(parent: 6d85c15) | patch
AMDGPU: Make VReg_1 size be 1
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 9 Sep 2019 18:43:29 +0000 (18:43 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 9 Sep 2019 18:43:29 +0000 (18:43 +0000)
commit7d3778229e968400632a104faa376ef94f852767
treedb251dbb46700c9b9d38f4ba03d23087608fd421tree | snapshot
parent6d85c15b5ffbabcb1d93aff5a8068fc1ec4ce399commit | diff
AMDGPU: Make VReg_1 size be 1

This was getting chosen as the preferred 32-bit register class based
on how TableGen selects subregister classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371438 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/SILowerI1Copies.cpp diff | blob | history
lib/Target/AMDGPU/SIRegisterInfo.cpp diff | blob | history
lib/Target/AMDGPU/SIRegisterInfo.td diff | blob | history
test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir diff | blob | history
test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir diff | blob | history
test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir diff | blob | history
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