]> granicus.if.org Git - llvm/commit
[PowerPC] [PowerPC] Enhance the fast selection of fptoi & fptrunc instruction and...
authorKang Zhang <shkzhang@cn.ibm.com>
Mon, 25 Feb 2019 02:46:16 +0000 (02:46 +0000)
committerKang Zhang <shkzhang@cn.ibm.com>
Mon, 25 Feb 2019 02:46:16 +0000 (02:46 +0000)
commit7cb6f240317bf85f62b8351d7e7ddbd1852e9113
tree01c2012140c142c818efb16891cbfc0af2e9c899
parent7c9a366492f2100672a93a4a3094e5bdadd41a3c
[PowerPC] [PowerPC] Enhance the fast selection of fptoi & fptrunc instruction and clean up related asserts

Summary:
Fast selection of llvm fptoi & fptrunc instructions is not handled well about
VSX instruction support.
We'd use VSX float convert integer instruction instead of non-vsx float convert
integer instruction if the operand register class is VSSRC or VSFRC because i32
and i64 are mapped to VSSRC and VSFRC correspondingly if VSX feature is
openeded.
For float trunc instruction, we do this silimar work like float convert integer
instruction to try to use VSX instruction.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D58430

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354762 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCFastISel.cpp
test/CodeGen/PowerPC/fast-isel-rsp.ll [new file with mode: 0644]
test/CodeGen/PowerPC/pr26180.ll