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(parent: 4977b97) | patch
Allow targets to opt-in to codegen in SCC order
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 4 Apr 2017 23:44:46 +0000 (23:44 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 4 Apr 2017 23:44:46 +0000 (23:44 +0000)
commit73135b623b8abe3a75965c7655a9dc291d79efc9
treec8e727442b3d98c96d0c8645af429f97043170f3tree | snapshot
parent4977b97dfc9ee607f0e99f750ca133fdd1e021ddcommit | diff
Allow targets to opt-in to codegen in SCC order

Decouple this setting from EnableIRPA.

To support function calls on AMDGPU, it is necessary to
report the global register usage throughout the kernel's
call graph, so callees need to be handled first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299487 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/CodeGen/TargetPassConfig.h diff | blob | history
lib/CodeGen/TargetPassConfig.cpp diff | blob | history
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