]> granicus.if.org Git - llvm/commit
MIR: Reject non-power-of-4 alignments in MMO parsing
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 30 Jan 2019 23:09:28 +0000 (23:09 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 30 Jan 2019 23:09:28 +0000 (23:09 +0000)
commit714cc866c2cd94b58f6d1ef26abb25767564f10c
tree70ef86ce9553d8c0d9b48d326441a5a91af6b77e
parentbab42cfa02b852c168c944391fcb76cba7d79e3f
MIR: Reject non-power-of-4 alignments in MMO parsing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352686 91177308-0d34-0410-b5e6-96231b3b80d8
22 files changed:
lib/CodeGen/MIRParser/MIParser.cpp
test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
test/CodeGen/ARM/fp16-litpool3-arm.mir
test/CodeGen/MIR/X86/expected-power-of-2-after-align.mir [new file with mode: 0644]
test/CodeGen/Mips/GlobalISel/instruction-select/pointers.mir
test/CodeGen/Mips/GlobalISel/instruction-select/stack_args.mir
test/CodeGen/Mips/GlobalISel/legalizer/add.mir
test/CodeGen/Mips/GlobalISel/legalizer/pointers.mir
test/CodeGen/Mips/GlobalISel/legalizer/stack_args.mir
test/CodeGen/Mips/GlobalISel/legalizer/sub.mir
test/CodeGen/Mips/GlobalISel/regbankselect/pointers.mir
test/CodeGen/Mips/GlobalISel/regbankselect/stack_args.mir
test/CodeGen/X86/GlobalISel/select-memop-scalar-x32.mir
test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir
test/CodeGen/X86/GlobalISel/x86-legalize-ptrtoint.mir
test/CodeGen/X86/GlobalISel/x86-legalize-srem.mir
test/CodeGen/X86/GlobalISel/x86-legalize-urem.mir
test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir
test/CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir
test/CodeGen/X86/GlobalISel/x86-select-srem.mir
test/CodeGen/X86/GlobalISel/x86-select-udiv.mir
test/CodeGen/X86/GlobalISel/x86-select-urem.mir