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[SKX] Enabling load/store instructions: encoding
authorRobert Khasanov <rob.khasanov@gmail.com>
Mon, 4 Aug 2014 14:35:15 +0000 (14:35 +0000)
committerRobert Khasanov <rob.khasanov@gmail.com>
Mon, 4 Aug 2014 14:35:15 +0000 (14:35 +0000)
commit7017934668cb81ad42dc000a9083c63849f3cfee
treeb893b05dc35416817b4279f8d68ec43547d1741btree | snapshot
parentc568629589bb0e5f4da6ba03bb495ad63858a679commit | diff
[SKX] Enabling load/store instructions: encoding
Instructions: VMOVAPD, VMOVAPS, VMOVDQA8, VMOVDQA16, VMOVDQA32,VMOVDQA64, VMOVDQU8, VMOVDQU16, VMOVDQU32,VMOVDQU64, VMOVUPD, VMOVUPS,

Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214719 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrAVX512.td diff | blob | history
lib/Target/X86/X86InstrFragmentsSIMD.td diff | blob | history
lib/Target/X86/X86InstrInfo.cpp diff | blob | history
test/CodeGen/X86/avx512-vec-cmp.ll diff | blob | history
test/MC/X86/avx512-encodings.s diff | blob | history
test/MC/X86/x86-64-avx512bw.s diff | blob | history
test/MC/X86/x86-64-avx512bw_vl.s [new file with mode: 0644] blob
test/MC/X86/x86-64-avx512f_vl.s [new file with mode: 0644] blob
utils/TableGen/X86DisassemblerTables.cpp diff | blob | history
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