]> granicus.if.org Git - llvm/commit
[ARM][MVE] Decoding of VMSR doesn't diagnose some unpredictable encodings
authorOliver Stannard <oliver.stannard@linaro.org>
Tue, 3 Sep 2019 09:55:30 +0000 (09:55 +0000)
committerOliver Stannard <oliver.stannard@linaro.org>
Tue, 3 Sep 2019 09:55:30 +0000 (09:55 +0000)
commit6e6a89a79276314c40c702a6107a385f048c15ba
tree9e36d6e87d83c6903094842ad7941bd6647a3e55
parent2536f8c7737db112d564966486b4cf0431135fac
[ARM][MVE] Decoding of VMSR doesn't diagnose some unpredictable encodings

Decoding of VMSR doesn't diagnose some unpredictable encodings, as the unpredictable bits are not correctly set.

Diff-reduce this instruction's internals WRT VMRS so I can see the differences better. Mostly this is s/src/Rt/g.

Fill in the "should-be-(0)" bits.

Designate the Unpredictable{} bits for both VMRS and VMSR.

Patch by Mark Murray!

Differential revision: https://reviews.llvm.org/D66938

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370729 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstrVFP.td
test/MC/Disassembler/ARM/vmrs-vmsr-invalid.txt [new file with mode: 0644]