]> granicus.if.org Git - llvm/commit
[MIPS MSA] Avoid some DAG combines for vector shifts
authorPetar Avramovic <Petar.Avramovic@rt-rk.com>
Wed, 20 Feb 2019 13:42:44 +0000 (13:42 +0000)
committerPetar Avramovic <Petar.Avramovic@rt-rk.com>
Wed, 20 Feb 2019 13:42:44 +0000 (13:42 +0000)
commit6d2316158f5100e25a8c063c661f2b96d57742ad
treee6974d25b7296dab84529c8eef034e0f48586b52
parentf7f662eb99097c71bd3abbc9262e65ef34e4f942
[MIPS MSA] Avoid some DAG combines for vector shifts

DAG combiner combines two shifts into shift + and with bitmask.
Avoid such combines for vectors since leaving two vector shifts
as they are produces better end results.

Differential Revision: https://reviews.llvm.org/D58225

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354461 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsISelLowering.cpp
lib/Target/Mips/MipsISelLowering.h
test/CodeGen/Mips/msa/avoid_vector_shift_combines.ll [moved from test/CodeGen/Mips/msa/vector_shift_combines.ll with 55% similarity]