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[x86][inline-asm] Introducing (AVX512) k0-k7 registers for inline-asm usage
authorMichael Zuckerman <Michael.zuckerman@intel.com>
Mon, 31 Oct 2016 09:37:59 +0000 (09:37 +0000)
committerMichael Zuckerman <Michael.zuckerman@intel.com>
Mon, 31 Oct 2016 09:37:59 +0000 (09:37 +0000)
commit6cac232972fc501f84f065d587a1c49ac3ae9cb4
tree00277f6136b748918878fedb39fd0d92bdf657d7tree | snapshot
parent780a9183bbdbdde327e06de4b2ef38bb8f511485commit | diff
[x86][inline-asm] Introducing (AVX512) k0-k7 registers for inline-asm usage

Commit on behalf of mharoush

After LGTM and check all:
This patch enables usage of k registers in inline assembly syntax.

Reviewer: 1. rnk
          2. delena

Differential Revision: https://reviews.llvm.org/D25011

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285555 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Basic/Targets.cpp diff | blob | history
test/CodeGen/avx512-inline-asm-kregisters-basics.c [new file with mode: 0644] blob
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