]> granicus.if.org Git - llvm/commit
[ARM] Tidy up banked registers encoding
authorJaved Absar <javed.absar@arm.com>
Thu, 3 Aug 2017 01:24:12 +0000 (01:24 +0000)
committerJaved Absar <javed.absar@arm.com>
Thu, 3 Aug 2017 01:24:12 +0000 (01:24 +0000)
commit65d41d8235523f0913767507b6c816e16caa2594
treee583b6ccbd23c1198493d7c9ecfae5c625bf1a69
parentca9f2fdb1929bc8725813fe9481f0d72b764c7a7
[ARM] Tidy up banked registers encoding

Moves encoding (SYSm) information of banked registers to ARMSystemRegister.td,
where it rightly belongs and forms a single point of reference in the code.

Reviewed by: @fhahn, @rovka, @olista01
Differential Revision: https://reviews.llvm.org/D36219

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309910 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelDAGToDAG.cpp
lib/Target/ARM/ARMSystemRegister.td
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
lib/Target/ARM/Utils/ARMBaseInfo.cpp
lib/Target/ARM/Utils/ARMBaseInfo.h