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(parent: 3bca053) | patch
AMDGPU: Fix folding reg_sequence into copy to phys reg
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 11 Apr 2017 22:29:19 +0000 (22:29 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 11 Apr 2017 22:29:19 +0000 (22:29 +0000)
commit651ac560976303c22335dfe07cbb1c34048e811a
treef7f472ca2b76127c7a23b05ce602f6d879356113tree | snapshot
parent3bca0534eec1c135d15914b31498b6639ef4b2f7commit | diff
AMDGPU: Fix folding reg_sequence into copy to phys reg

This was producing an illegal reg_sequence defining
a physical register with virtual register inputs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299997 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/SIFixSGPRCopies.cpp diff | blob | history
test/CodeGen/AMDGPU/inline-asm.ll diff | blob | history
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