[AArch64] Turn BIC immediate creation into a DAG combine

[AArch64] Turn BIC immediate creation into a DAG combine

Switch BIC immediate creation for vector ANDs from custom lowering
to a DAG combine, which gives generic DAG combines a change to
apply first. In particular this avoids (and x, -1) being turned into
a (bic x, 0) instead of being eliminated entirely.

Differential Revision: https://reviews.llvm.org/D59187

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356299 91177308-0d34-0410-b5e6-96231b3b80d8