]> granicus.if.org Git - llvm/commit
[X86] AMD Piledriver (BdVer2): fine-tune some latencies
authorRoman Lebedev <lebedev.ri@gmail.com>
Thu, 28 Mar 2019 13:40:34 +0000 (13:40 +0000)
committerRoman Lebedev <lebedev.ri@gmail.com>
Thu, 28 Mar 2019 13:40:34 +0000 (13:40 +0000)
commit60eba9fc37f891867b764d77ea244c2448ade683
tree3f818a138932b10f4e04dc328c286fab6246423e
parent5df438c998011d221eae6483f18566bf73eddbec
[X86] AMD Piledriver (BdVer2): fine-tune some latencies

Based on llvm-exegesis measurements.

Now that llvm-exegesis is ~2 magnitudes faster, and is a bit smarter,
it is now possible to continue cleanup of the scheduler model.

With this, there are no more latency inconsistencies for the
opcodes that produce stable measurements, and only a few inconsistencies
for unstable measurements (MMX_* opcodes, opcodes that llvm-exegesis
measures by chaining - CMP, TEST, BT, SETcc, CVT, MOV, etc.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357169 91177308-0d34-0410-b5e6-96231b3b80d8
13 files changed:
lib/Target/X86/X86ScheduleBdVer2.td
test/tools/llvm-mca/X86/BdVer2/int-to-fpu-forwarding-2.s
test/tools/llvm-mca/X86/BdVer2/pipes-fpu.s
test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-2.s
test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-3.s
test/tools/llvm-mca/X86/BdVer2/resources-avx1.s
test/tools/llvm-mca/X86/BdVer2/resources-mmx.s
test/tools/llvm-mca/X86/BdVer2/resources-sse1.s
test/tools/llvm-mca/X86/BdVer2/resources-sse2.s
test/tools/llvm-mca/X86/BdVer2/resources-sse41.s
test/tools/llvm-mca/X86/BdVer2/resources-sse42.s
test/tools/llvm-mca/X86/BdVer2/resources-x86_64.s
test/tools/llvm-mca/X86/BdVer2/resources-xop.s