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[X86] Add additional patterns for folding loads with 128-bit VCVTDQ2PD and VCVTUDQ2PD.
authorCraig Topper <craig.topper@intel.com>
Sat, 14 Oct 2017 04:18:09 +0000 (04:18 +0000)
committerCraig Topper <craig.topper@intel.com>
Sat, 14 Oct 2017 04:18:09 +0000 (04:18 +0000)
commit60273a80213af332e8a7ecd8a7e074bdbfd2095d
treee5a080176881274ca81f118ee05b24f83c5ff6e7tree | snapshot
parent3207cbf119ffa421f24618234bea32825039b3b7commit | diff
[X86] Add additional patterns for folding loads with 128-bit VCVTDQ2PD and VCVTUDQ2PD.

This matches the patterns we have for the SSE/AVX version.

This is a prerequisite for D38714.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315797 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrAVX512.td diff | blob | history
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