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[X86] Add more of the icc unaligned load/store to/from 128 bit vector intrinsics
authorCraig Topper <craig.topper@intel.com>
Sat, 29 Sep 2018 17:49:42 +0000 (17:49 +0000)
committerCraig Topper <craig.topper@intel.com>
Sat, 29 Sep 2018 17:49:42 +0000 (17:49 +0000)
commit5fd1ab66bf97297c2b71ce3ec2bb33d579bca06e
treec6ac350aff6f5f1512f63176c048142bf80f411btree | snapshot
parent792faf1a89d5a4c08b1210a525d385332cc9a78bcommit | diff
[X86] Add more of the icc unaligned load/store to/from 128 bit vector intrinsics

Summary:
This patch adds
_mm_loadu_si32
_mm_loadu_si16
_mm_storeu_si64
_mm_storeu_si32
_mm_storeu_si16

We already had _mm_load_si64.

Reviewers: spatel, RKSimon

Reviewed By: RKSimon

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D52665

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@343388 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Headers/emmintrin.h diff | blob | history
test/CodeGen/sse2-builtins.c diff | blob | history
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