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RegisterScavenger: Allow fail without spill
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 25 Feb 2019 20:29:04 +0000 (20:29 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 25 Feb 2019 20:29:04 +0000 (20:29 +0000)
commit5b73c52a7ed3d39e0460665840ef1abbad253f5e
tree967c3fef2899f1050484f5b2f356e1b51665d1a7tree | snapshot
parentf25266101e3a715fb377960a7cf99c4f9ec2f37ecommit | diff
RegisterScavenger: Allow fail without spill

AMDGPU wants to use this in some contexts where
the spilling is either impossible, or a worse alternative
to doing something else.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354816 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/CodeGen/RegisterScavenging.h diff | blob | history
lib/CodeGen/RegisterScavenging.cpp diff | blob | history
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