granicus.if.org Git - llvm/commit

]> granicus.if.org Git - llvm/commit

author	Juergen Ributzka <juergen@apple.com>
	Mon, 27 Oct 2014 19:16:48 +0000 (19:16 +0000)
committer	Juergen Ributzka <juergen@apple.com>
	Mon, 27 Oct 2014 19:16:48 +0000 (19:16 +0000)
commit	5745cad86144b8a3d47f55568daff433033cf202
tree	a2153f88cb7d446ef3327faea73fb91428a88b6f	tree \| snapshot
parent	d3a04223e84797a1432f10d7a153da6c258017a9	commit \| diff

[FastISel][AArch64] Don't fold the 'and' instruction into the 'tbz/tbnz' instruction if it is in a different basic block.

This fixes a bug where the input register was not defined for the 'tbz/tbnz'
instruction. This happened, because we folded the 'and' instruction from a
different basic block.

This fixes rdar://problem/18784013.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220704 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AArch64/AArch64FastISel.cpp		diff \| blob \| history
test/CodeGen/AArch64/fast-isel-tbz.ll		diff \| blob \| history

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