]> granicus.if.org Git - llvm/commit
[X86] Add a pass to convert instruction chains between domains.
authorGuy Blank <guy.blank@intel.com>
Sun, 22 Oct 2017 11:43:08 +0000 (11:43 +0000)
committerGuy Blank <guy.blank@intel.com>
Sun, 22 Oct 2017 11:43:08 +0000 (11:43 +0000)
commit5631544a096b0a3b48213f757e0cd47d10afa2fd
tree5634a7c7acc52ef73a8c1b4b3715537332bb74d2
parentce20559b072725bb5bab5d643f09c51909d27131
[X86] Add a pass to convert instruction chains between domains.

The pass scans the function to find instruction chains that define
registers in the same domain (closures).
It then calculates the cost of converting the closure to another domain.
If found profitable, the instructions are converted to instructions in
the other domain and the register classes are changed accordingly.

This commit adds the pass infrastructure and a simple conversion from
the GPR domain to the Mask domain.

Differential Revision:
https://reviews.llvm.org/D37251

Change-Id: Ic2cf1d76598110401168326d411128ae2580a604

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316288 91177308-0d34-0410-b5e6-96231b3b80d8
12 files changed:
lib/Target/X86/CMakeLists.txt
lib/Target/X86/X86.h
lib/Target/X86/X86DomainReassignment.cpp [new file with mode: 0644]
lib/Target/X86/X86TargetMachine.cpp
test/CodeGen/X86/avx512-insert-extract.ll
test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
test/CodeGen/X86/avx512-mask-op.ll
test/CodeGen/X86/avx512-schedule.ll
test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll
test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll
test/CodeGen/X86/domain-reassignment.mir [new file with mode: 0644]
test/CodeGen/X86/gpr-to-mask.ll