]> granicus.if.org Git - llvm/commit
Title: Improve Loop Cache Analysis LIT tests.
authorWhitney Tsang <whitney.uwaterloo@gmail.com>
Fri, 9 Aug 2019 16:18:22 +0000 (16:18 +0000)
committerWhitney Tsang <whitney.uwaterloo@gmail.com>
Fri, 9 Aug 2019 16:18:22 +0000 (16:18 +0000)
commit561feff1330d9abf3d83351f91e89938d324487e
treeaf9c93884d394732470cdb061a7f087c52448c9b
parent25ebdf539b6466b05bb650a5b06d44860d8bc4e2
Title: Improve Loop Cache Analysis LIT tests.
Summary: Make LIT tests unsensitive to analysis output order.
Authored By: etiotto

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@368450 91177308-0d34-0410-b5e6-96231b3b80d8
test/Analysis/LoopCacheAnalysis/PowerPC/loads-store.ll
test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll
test/Analysis/LoopCacheAnalysis/PowerPC/matvecmul.ll
test/Analysis/LoopCacheAnalysis/PowerPC/single-store.ll
test/Analysis/LoopCacheAnalysis/PowerPC/stencil.ll