]> granicus.if.org Git - llvm/commit
[DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 11 Jul 2019 14:45:03 +0000 (14:45 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 11 Jul 2019 14:45:03 +0000 (14:45 +0000)
commit554857d12060087268988a190cb4451d65d09443
tree567abb38afb30f9628e2500c7c3cf12c0e05f937
parentd160c324743f5c9ad1e56090c1c17b2f2df1dde5
[DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support

We already split extract_subvector(binop(insert_subvector(v,x),insert_subvector(w,y))) -> binop(x,y).

This patch adds support for extract_subvector(binop(concat_vectors(),concat_vectors())) cases as well.

In particular this means we don't have to wait for X86 lowering to convert concat_vectors to insert_subvector chains, which helps avoid some cases where demandedelts/combine calls occur too late to split large vector ops.

The fast-isel-store.ll load folding regression is annoying but I don't think is that critical.

Differential Revision: https://reviews.llvm.org/D63653

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365785 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
test/CodeGen/AMDGPU/fmax_legacy.f16.ll
test/CodeGen/AMDGPU/fmin_legacy.f16.ll
test/CodeGen/X86/fast-isel-store.ll
test/CodeGen/X86/machine-combiner-int-vec.ll
test/CodeGen/X86/nontemporal-2.ll
test/CodeGen/X86/vec_saddo.ll
test/CodeGen/X86/vec_ssubo.ll