Merging r243469:

Merging r243469:
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r243469 | vkalintiris | 2015-07-28 12:57:25 -0700 (Tue, 28 Jul 2015) | 12 lines

[mips][FastISel] Fix generated code for IR's select instruction.

Summary:
Generate correct code for the select instruction by zero-extending
it's boolean/condition operand to GPR-width. This is necessary because
the conditional-move instructions operate on the whole register.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11506
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_37@243646 91177308-0d34-0410-b5e6-96231b3b80d8