]> granicus.if.org Git - llvm/commit
[AArch64][SVE2] Add SVE2 target features to backend and TargetParser
authorCullen Rhodes <cullen.rhodes@arm.com>
Mon, 13 May 2019 10:10:24 +0000 (10:10 +0000)
committerCullen Rhodes <cullen.rhodes@arm.com>
Mon, 13 May 2019 10:10:24 +0000 (10:10 +0000)
commit5324e6dceb26a80a9748f893f20b7f61e04237e8
treee1f0ee2d3e9f514afabd13daa041d8fa1a4529b8
parent12d462cd1b340e395643829dbf111940d88fcb40
[AArch64][SVE2] Add SVE2 target features to backend and TargetParser

Summary:
This patch adds the following features defined by Arm SVE2 architecture
extension:

  sve2, sve2-aes, sve2-sm4, sve2-sha3, bitperm

For existing CPUs these features are declared as unsupported to prevent
scheduler errors.

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewers: SjoerdMeijer, sdesmalen, ostannard, rovka

Reviewed By: SjoerdMeijer, rovka

Subscribers: rovka, javed.absar, tschuett, kristof.beyls, kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61513

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360573 91177308-0d34-0410-b5e6-96231b3b80d8
19 files changed:
include/llvm/Support/AArch64TargetParser.def
include/llvm/Support/AArch64TargetParser.h
include/llvm/Support/ARMTargetParser.h
lib/Support/AArch64TargetParser.cpp
lib/Target/AArch64/AArch64.td
lib/Target/AArch64/AArch64InstrInfo.td
lib/Target/AArch64/AArch64SchedA53.td
lib/Target/AArch64/AArch64SchedA57.td
lib/Target/AArch64/AArch64SchedCyclone.td
lib/Target/AArch64/AArch64SchedExynosM1.td
lib/Target/AArch64/AArch64SchedExynosM3.td
lib/Target/AArch64/AArch64SchedExynosM4.td
lib/Target/AArch64/AArch64SchedFalkor.td
lib/Target/AArch64/AArch64SchedKryo.td
lib/Target/AArch64/AArch64SchedThunderX.td
lib/Target/AArch64/AArch64SchedThunderX2T99.td
lib/Target/AArch64/AArch64Subtarget.h
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
unittests/Support/TargetParserTest.cpp