]> granicus.if.org Git - llvm/commit
RegAllocFast: Remove early selection loop, the spill calculation will report cost...
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 19 Mar 2019 19:01:34 +0000 (19:01 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 19 Mar 2019 19:01:34 +0000 (19:01 +0000)
commit51c2ad77cdef7b7743ed52bfdc5083881583ff7c
tree4d8b9e920e2be580e7af87480810339d9784044d
parent04a982d9fb06ae63910b78d7a8c1c8661079a891
RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs

The 2nd loop calculates spill costs but reports free registers as cost
0 anyway, so there is little benefit from having a separate early
loop.

Surprisingly this is not NFC, as many register are marked regDisabled
so the first loop often picks up later registers unnecessarily instead
of the first one available in the allocation order...

Patch by Matthias Braun

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356499 91177308-0d34-0410-b5e6-96231b3b80d8
34 files changed:
lib/CodeGen/RegAllocFast.cpp
test/CodeGen/AArch64/arm64-fast-isel-br.ll
test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll
test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
test/CodeGen/AArch64/swift-return.ll
test/CodeGen/AArch64/swifterror.ll
test/CodeGen/ARM/Windows/alloca.ll
test/CodeGen/ARM/thumb-big-stack.ll
test/CodeGen/Mips/Fast-ISel/callabi.ll
test/CodeGen/Mips/Fast-ISel/pr40325.ll
test/CodeGen/Mips/GlobalISel/llvm-ir/add.ll
test/CodeGen/Mips/GlobalISel/llvm-ir/icmp.ll
test/CodeGen/Mips/GlobalISel/llvm-ir/mul.ll
test/CodeGen/Mips/GlobalISel/llvm-ir/rem_and_div.ll
test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll
test/CodeGen/Mips/GlobalISel/llvm-ir/stack_args.ll
test/CodeGen/Mips/GlobalISel/llvm-ir/sub.ll
test/CodeGen/Mips/GlobalISel/llvm-ir/truncStore_and_aExtLoad.ll
test/CodeGen/Mips/atomic.ll
test/CodeGen/Mips/atomic64.ll
test/CodeGen/Mips/atomicCmpSwapPW.ll
test/CodeGen/PowerPC/anon_aggr.ll
test/CodeGen/PowerPC/fp-int128-fp-combine.ll
test/CodeGen/PowerPC/fp64-to-int16.ll
test/CodeGen/PowerPC/vsx.ll
test/CodeGen/SystemZ/swifterror.ll
test/CodeGen/X86/atomic-unordered.ll
test/CodeGen/X86/avx-load-store.ll
test/CodeGen/X86/extend-set-cc-uses-dbg.ll
test/CodeGen/X86/fast-isel-select.ll
test/CodeGen/X86/fast-isel-x86-64.ll
test/CodeGen/X86/pr27591.ll
test/CodeGen/X86/swift-return.ll
test/DebugInfo/X86/op_deref.ll