]> granicus.if.org Git - llvm/commit
[x86] make 8-bit shl undesirable
authorSanjay Patel <spatel@rotateright.com>
Mon, 8 Apr 2019 13:58:50 +0000 (13:58 +0000)
committerSanjay Patel <spatel@rotateright.com>
Mon, 8 Apr 2019 13:58:50 +0000 (13:58 +0000)
commit50de781fc93aa202b32428f162f811c717807029
tree3499628281f953694b7bc40ac24a3700556f3513
parentf7721ae87dc47dd14365f7ca6a743b385f3441e3
[x86] make 8-bit shl undesirable

I was looking at a potential DAGCombiner fix for 1 of the regressions in D60278, and it caused severe regression test pain because x86 TLI lies about the desirability of 8-bit shift ops.

We've hinted at making all 8-bit ops undesirable for the reason in the code comment:

// TODO: Almost no 8-bit ops are desirable because they have no actual
//       size/speed advantages vs. 32-bit ops, but they do have a major
//       potential disadvantage by causing partial register stalls.

...but that leads to massive diffs and exposes all kinds of optimization holes itself.

Differential Revision: https://reviews.llvm.org/D60286

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357912 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/bt.ll
test/CodeGen/X86/btc_bts_btr.ll
test/CodeGen/X86/rotate4.ll
test/CodeGen/X86/scheduler-backtracking.ll
test/CodeGen/X86/select_const.ll