]> granicus.if.org Git - llvm/commit
[ARM] MVE i1 splat
authorDavid Green <david.green@arm.com>
Thu, 19 Sep 2019 12:17:41 +0000 (12:17 +0000)
committerDavid Green <david.green@arm.com>
Thu, 19 Sep 2019 12:17:41 +0000 (12:17 +0000)
commit4faf75d05129af90aa794184742bcb75f6c841be
tree49827e985c4fa35edade4a2726d36a132c85f25c
parentd1b0a6d484af82d202ce2b8df3f7b8f24e47c97d
[ARM] MVE i1 splat

We needn't BFI each lane individually into a predicate register when each lane
in the same. A simple sign extend and a vmsr will do.

Differential Revision: https://reviews.llvm.org/D67653

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372313 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelLowering.cpp
test/CodeGen/Thumb2/mve-pred-build-var.ll