]> granicus.if.org Git - llvm/commit
AArch64: enforce even/odd register pairs for CASP instructions.
authorTim Northover <tnorthover@apple.com>
Wed, 6 Feb 2019 15:26:35 +0000 (15:26 +0000)
committerTim Northover <tnorthover@apple.com>
Wed, 6 Feb 2019 15:26:35 +0000 (15:26 +0000)
commit4e9d732b58d442dfbfba958ea6f4d30b553b7c4c
tree2552b14e925afdd27931735bf964a0ff88bb1dba
parentae502dc0ce0d8d08a01a2466e92a332a3901d61e
AArch64: enforce even/odd register pairs for CASP instructions.

ARMv8.1a CASP instructions need the first of the pair to be an even register
(otherwise the encoding is unallocated). We enforced this during assembly, but
not CodeGen before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353308 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64RegisterInfo.td
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
test/CodeGen/AArch64/cmpxchg-lse-even-regs.ll [new file with mode: 0644]