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[Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassemb...
authorColin LeMahieu <colinl@codeaurora.org>
Fri, 5 Dec 2014 17:27:39 +0000 (17:27 +0000)
committerColin LeMahieu <colinl@codeaurora.org>
Fri, 5 Dec 2014 17:27:39 +0000 (17:27 +0000)
commit4c58675d356b97bd64c9ff93d8b38aa9c3ca8cc6
treecc987e18e3e704214bd98778571e0814c7230259tree | snapshot
parent33f1a430c281522fb603dec0d65345789ebecdb4commit | diff
[Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassembly tests for many instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223482 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Hexagon/HexagonInstrInfo.td diff | blob | history
test/MC/Disassembler/Hexagon/alu32_alu.txt diff | blob | history
test/MC/Disassembler/Hexagon/alu32_perm.txt [new file with mode: 0644] blob
test/MC/Disassembler/Hexagon/alu32_pred.txt [new file with mode: 0644] blob
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