[SVE][Inline-Asm] Add constraints for SVE predicate registers

[SVE][Inline-Asm] Add constraints for SVE predicate registers

Summary:
Adds the following inline asm constraints for SVE:
  - Upl: One of the low eight SVE predicate registers, P0 to P7 inclusive
  - Upa: SVE predicate register with full range, P0 to P15

Reviewers: t.p.northover, sdesmalen, rovka, momchil.velikov, cameron.mcinally, greened, rengolin

Reviewed By: rovka

Subscribers: javed.absar, tschuett, rkruppe, psnobl, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66524

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371967 91177308-0d34-0410-b5e6-96231b3b80d8